内存参数
| 内存电压 |
1.5 V |
| 内置存储器 |
2 GB |
| 内存类型 |
DDR3 |
| 内存时钟速度 |
1333 MHz |
| CAS响应时间 |
8 |
| 错误更正代码 |
N |
| 內存佈局(模塊 x 內存大小) |
1 x 2 GB |
| 注册 |
N |
DDR3-1333 2GB - longdimm module, PC3 10600, 128Mx8 IC organisation
These memory devices are JEDEC standard unbuffered DIMMs, based on
CMOS DDR3 SDRAM technology using DDR3 SDRAMs in FBGA packages on
a 240-pin glass epoxy substrate. The memory array is designed with Double Data Rate (DDR3) Synchronous DRAMs for unbuffered applications.
Fly-by command/address/control bus architecture of DDR3 SDRAMs allows
for concurrent operation, thereby providing high, effective bandwidth. This main benefit of DDR3 is made possible by its 8 bit prefetch buffer.
DDR3 memory ensures a power consumption reduction of 30% compared to
DDR2 modules due to DDR3's 1.5 V supply voltage, also defined as
"Enhanced low power features". These modules feature Serial Presence Detect (SPD) based on a serial EEPROM device. DDR3 SPD programming is based on a speed bin. DDR3 latencies are numerically higher because the clock cycles by which they are measured are shorter. Absolute latency (ns) is generally equal to or faster than DDR2.